[Áú¹®] P6DGE ECC¸Þ¸ð¸®...

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¾È³çÇϼ¼¿ä.

¿äÁò °è¼Ó Áú¹®·¯½¬³×¿ä.

´Ù¸¥°Ô ¾Æ´Ï°í Á¦ µà¾óº¸µå P5DGE ¸Å´º¾ó¿¡ º¸´Ï ECC¸Þ¸ð¸®¸¦ Áö¿øÇÏ´Ù´õ±º¿ä.

±×·±µ¥ ¾Æ·¡ ¸Å´º¾óÀ» º¸¸é none REG / ECC, REG/ECC µÑ ´Ù Áö¿øÇÑ´Ù´Â °Í °°Àºµ¥...

512¸ðµâ REG/ECC ¸Þ¸ð¸® »ç¿ë°¡´ÉÇÑ°¡¿ä?

±×¸®°í answer¸¦ º¸¸é ÀϹݷ¥Àº 8~512M¸ðµâÀ», REG ·¥Àº 8~2G¸ðµâÀ» Áö¿øÇÑ´Ù´Â °ÍÀΰ¡¿ä?
(ÃÖ´ë ¸Þ¸ð¸® ¿ë·®Àº 2G)

*Memory
• 2 GB unbuffered 3.3V SDRAM or 2 GB registered SDRAM
(Note: When the CPU bus is running at 100 MHz, the SDRAM must be PC-100 compliant
DIMMs.)
(Note: The maximum cacheable memory size depends on processor capabilities.)
• ECC (Error Checking and Correction), non-ECC and Error Checking
supported
*Chipset
• Intel 440GX


Question: What are the differences between the various memories
that the 440GX motherboard can support?

Answer: The 440GX integrates a main memory DRAM controller that
supports a 64-bit or 72-bit (64 bits of memory data plus 8 ECC bits.) DRAM
from 8 MB to 512 MB for SDRAM and from 8 MB to 2 GB SDRAM/registered
DIMMs. DRAM types supported are either Synchronous DRAM (SDRAM) or
Registered DIMM modules. Please note the following:

1. Mixing ECC and non-ECC will result in non-ECC operation. EC/ECC is
supported properly in the 440GX only if all the memory is 72-bits wide. A
system with a mixture of 64- and 72-bit wide memory will disable ECC mode.

2. Registered SDRAM and unbuffered SDRAM cannot be mixed.

3. Mixing PC/100 DIMMs and PC/66 DIMMs will result in an unexpected
memory count or system errors.

4. User should populate memory starting with the DIMM socket located the
furthest from the GX chip (U2 on P6DGS/P6DGE or U4 on P6DGU/P6SGU
ªÀº±Û Àϼö·Ï ½ÅÁßÇÏ°Ô.


QnA
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